Powerful register management tool that facilitates hardware/software interface collaboration for IPs and systems.
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Boost productivity, promote collaboration and increase quality of your SoC/IP register and memory map data with a single-source solution. |
As SoC complexity increases, the integration of multiple IPs and sub-systems is overloading design and verification flows. The complete software view of an SoC from IP register to full system memory map is typically captured and defined in an ad-hoc manner across document specifications, software libraries, design and verification databases. This leads to a node in the design flow that is highly inefficient, error prone and constantly out-of-sync.
BITWISE provides a fully automated specification solution that allows single-source definition of the HW/SW interface of a full system, allowing earlier software integration, higher productivity, less bugs and less hassle.
Highlights
- Provides a complete HW/SW interface solution in a single-source specification of register and memory map data for IP, sub-system and chip
- Promotes massive reuse of IP or sub-system register data across multiple views including HW/SW design, verification, integration and documentation
- Allows earlier SW integration
- Fast-tracks IP and SoC system level validation
- Immediate Turn-Around-time for system changes
- Increased quality with a vast range of coherency checks
- Promotes IP reuse, capture once—use anywhere
- Eliminates manual error prone processes
- Flexible and customizable generation framework to allow users generate their own format quickly and efficiently
- Interoperable within your design flow through standards based interfaces
- Available in several licensing options
- Runs on Windows, Linux and Solaris
In common with the other tools in the Socrates SoC Integration suite, there are three primary elements to Bitwise:
- CAPTURE register and memory map information. This can be done through the import of existing designs in IP-XACT or other textual formats or by direct input of the information through the intuitive and ergonomic GUI. Bitwise can define all register and memory map information associated with IP, Subsystems and SoC, stored in a central repository and linked to any other Bitwise captured system. It enables all users of the data to see a coherent, in-sync, up to date picture of the real status of the IP.
- VALIDATE the information to ensure its quality. Bitwise incorporates a vast array of coherency checks to ensure that the information input or imported to the tool is coherent and non-conflicting. This aligns with the correct-by-construction methodology employed throughout Socrates
- GENERATE documentation, code, test cases etc. The Bitwise Generator Framework allows users to mould the information captured in the tool to generate outputs that are tailored to their own specific needs. Customizable generator templates provide a user friendly API to create new generators..
Bitwise provides a single, living repository for register and memory map information that can be used by all of the developers. This helps to ensure that all engineers are using the latest information at all times and prevents misalignment between the hardware developers and the SoC validation or embedded software teams. This has the effect of streamlining the SoC development process and reducing the potential for costly bugs in the system.
For more For more information on Bitwise, download the Bitwise Product Brief