The rationale for using spinner as the single source repository for all your I/O design data is undisputable when customers begin to leverage the Spinner customizable generator framework.
Spinner comes with a built-in suite of generators:
- I/O Fabric RTL in VHDL, Verilog and IP-XACT formats
- System Test-bench Infrastructure
- Excel, RFT and HTML documentation generators
- TCL verification structure and self checking test-bench
- System Verilog and Specman verification structures
- JTAG BSDL
- I/O Configuration Register IP-XACT description
- I/O Configuration Register C Header files
- I/O Configuration Register RTL decode block
Spinner's generator framework allows customers to create new generators with minimum effort. Existing generator templates can be extracted and used as a starting point for the creation of new generators. The full set of spinner design data maintained in the spinner source repository is accessible to the generator framework. The process of integrating a new customer generator into the spinner tool takes a matter of minutes and there is no recompile step required.
Duolog has an experienced team of FAEs who can be contracted to create customer specific generators. The Spinner FAE team has a massed expertise in a wide array of output formats which can be generated using the spinner tool. Some examples are:
- Static Timing Analysis and Synthesis Constraints scripts
- Package and Die backend flow layout constraints
- Emerging Power standards such as Common Power Format and Unified Power Format
- ATPG Models
- LVS Models (spice, cdl, edif)
- Signaling Models (SPICE and IBIS)
For more information on Spinner, download the Spinner Product Brief or return to the Spinner Product Page.