| The Open Verification Methodology (OVM) is an advanced verification standard developed by Cadence and Mentor Graphics that promotes best-in-class verification solutions supported by a full object-oriented environment. This delivers key verification capability and high-levels of Verification IP (VIP) reusability through the use Open Verification Components (OVCs) |
Additionally Duolog has the following highlights regarding OVM:
- Duolog offers an intuitive high-level integration platform that can generate design, verification and software views from IP to chip-level
- Rapid development of OVM infrastructure including auto-generation of DUT Wrappers, new OVCs, off-the-shelf OVCs, register packages and corresponding testcases and the OVM infrastructure
- Full support for OVM register package through Bitwise. Explicit support for a wide range of register implementations including ID registers, modal behaviour, access types, collections and arrays of registers, memories etc., as well as OVM required information
- Less time spent debugging and fixing bugs as Socrates ensures correct-by-construction and synchronisation between design, verification and software views removes interpretation, translation and synchronisation bugs
- Support of IP-XACT to allow streamlining between IP metadata and OVM environments
Duolog also provides turnkey IP verification services which utilize both our EDA tools and our SystemVerilog/OVM expertise to deliver high-value verification solutions.
Click below to view some of our collateral on OVM
As all of the tools in the Socrates tool suite support IP-XACT, it is possible to streamline IP-XACT to OVM Flows.