Duolog CTO Discusses SoC Integration Challenges
The EDA360 vision paper emphasizes the need for EDA tool support for system-on-chip (SoC) integration. Cadence Connections partner Duolog Technologies agrees – and in fact, SoC/IP integration is the company’s mission. Duolog sells the Socrates Chip Integration Platform, and recently collaborated with Cadence on standards support. Duolog has also published a whitepaper titled “Socrates – Realizing the EDA360 Vision.”
In this interview Dave Murray, CTO of Duolog, discusses the company’s background, the need for SoC/IP integration, key customer challenges, Socrates, and EDA360.
Q: Dave, can you provide some background about Duolog?
A: Duolog was set up in 1999 as a design services and IP design company. We deployed our services into big semiconductor companies in the early 2000′s. We found there was an emerging problem with integrating IP into complex systems, and there were no targeted solutions out there. So we started developing utilities to help customers with their integration challenges, and the results were very good.
In 2007 we switched business models. We dropped IP development and became an EDA company focused specifically on integration. In 2008 we had our first appearance at DAC [Design Automation Conference] with Socrates and won three “best of DAC” awards.
Q: Why did you choose to target SoC integration?
A: We found there were a lot of problems with growing complexity. IP was becoming more complex, the number of IP blocks was increasing, and customer design flows weren’t scaling. There were a lot of problems due to integration, and it was difficult to integrate a chip effectively.
Typical flows were combinations of unstructured data, documents, spreadsheets, and scripts. Customers had ad-hoc front-end environments driving integration activities. We found flows were reaching the breaking point, so we developed solutions in this area.
Q: Specifically, what are customers complaining about most?
A: A big complaint is that there’s too much data in the design flow and design flows aren’t scaling. IP is now the building block for SoC design, there are more IP blocks, and they are becoming more complex and have more domains to satisfy including hardware, software, verification, TLM, power, and analog/mixed signal. The number of models and data points keeps increasing!
For example, regarding the hardware/software interface, many teams have a vested interest in their view of the system. Keeping these views synchronized is one of the bigger emerging problems. We see big problems, for instance, where a software engineer is writing firmware code against an out-of-date version of the design, be it a virtual model, an FPGA model or the actual silicon. This is a nightmare.
Q: Are design teams still struggling with IP quality?
A: When you’re sourcing third-party IP, there’s always the question of IP quality. Next-generation verification methodologies allow a good view of the verification coverage of IP, but I think improving IP quality is still an ongoing process. Can an IP vendor guarantee every possible configuration that might be out there? It’s an ongoing challenge.
Q: What difficulties do design teams encounter at the hardware/software interface?
A: When software is a dominant component of system design, it mandates early hardware releases so early software development and integration can begin. The hardware/software interface needs to be kept equivalent and synchronized across all different design teams throughout the design flow. At some point, software needs to be written against an accurate model of the hardware/software so that it can run, without integration problems, on a real chip implementation. Also, early-and-often hardware releases can be very manually intensive to incrementally integrate, and this can compound integration activities.
Q: In brief, what does Socrates do?
A: The goal of Socrates is to provide comprehensive automation of chip integration. It does this through three aspects. The first aspect is IP management, and the focus is to remove as much unstructured data from the IP development process as possible. When you go to integrate the IP, that streamlines the integration process.
The second aspect is providing an efficient IP integration flow, by which we can instantiate, configure, connect, and build subsystems and full systems from an IP repository. Socrates does that through a rules-based integration approach. It can synthesize a chip netlist and all its connectivity from a high-level specification — a set of rules, specified using a small but powerful set of integration instructions. These rules drive the full connectivity synthesis.
The third capability is system integration. When you put your IP down onto the SoC, you need to resolve bus fabrics, power fabrics, I/O fabrics, and debug at the subsystem and SoC levels. We offer numerous applications in this area and we’re also partnering with fabric providers to provide drop-in integration capabilities.
Q: What data does Socrates take in? Are you using IP-XACT?
A: We can extract information from a wide range of formats, including Excel, XML, and IP-XACT. The main format for a lot of this information is Excel, but more and more people are moving to IP-XACT. It provides a standardized view of the data that we can interpret. If a customer has an IP-XACT view of their IP, we can provide a very fast path to IP integration.
Q: What benefits are customers talking about?
A: They’re getting self-checking, executable specs from a single source, and the benefits are increased quality, increased productivity, improved scheduling, and lower costs. The most common denominator comes down to fewer bugs. We accomplish that through an automated, correct-by-construction methodology that can process a single-source specification into different target views.
Q: What did the recent Cadence collaboration involve?
A: Duolog’s expertise and focus is on managing and automating the data. We need to hook up with partners who have best-practice expertise, for instance, UVM [Universal Verification Methodology] and proven flows. We worked with Cadence to ensure we can provide not just a verification format, but a verification flow — one that helps to reduce HW/SW integration errors. We’re also looking at standardizing this flow further by extending IP-XACT to capture UVM metadata.
Q: I know you’ve published a whitepaper about this topic, but in brief, how does Socrates fit into the EDA360 vision?
A: EDA360 calls for integration-ready IP, an integration platform, and early software development. Socrates delivers these key concepts by providing correct-by-construction, synchronized views of IP and a very efficient integration platform. Socrates also has key capabilities in hardware/software interface management which allows smoother hardware/software integration.
We definitely support the EDA360 concept. I think our [Cadence] collaboration is very much aligned to the EDA360 vision.