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Events
DVCon 2012: Duolog will exhibit at Booth #302 the 28-29th FebruaryDuolog is exhibiting at DVCon at Booth #302 and presenting “Addressing HW/SW Interface Quality through Standards” on Monday, the 27th February at 3:30. Learn more
EDSFair & Embedded Technology 2011: Duolog will exhibit at Booth F-36 the 16-18th NovemberEDSFair & Embedded Technology 2011 in Yokohama City, Japan – Exhibiting with Innotech on the 16-18th November 2011 Learn more
Duolog to Present Revolutionary EDA Tools at MIDAS AGMDuolog has been selected to present their award-winning EDA tools at the MIDAS AGM on the 24th November 2011. The event takes place at the Convention Centre in Dublin, Ireland. Learn more
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Jack Donovan Joins Duolog to Drive Expansion of ESL and TLM SolutionsDUBLIN, Ireland, December 13th 2011 – Duolog Technologies, the award-winning developer of IP and SoC integration products, today announced that semiconductor industry veteran and SystemC guru, Jack Donovan, has joined the Duolog team. Based in the company’s Galway, Ireland office, … Learn more
Duolog IP and SoC Integration Tools Available for Immediate Evaluation via XuropaDuolog today announced that both the Socrates Weaver and Socrates Spinner tools are now available for evaluation in the cloud on the Xuropa Cloud Platform. Learn more
Duolog and Cadence to Validate Interoperability from TLM Virtual Prototype through RTL AssemblyDuolog is collaborating with Cadence to validate system development flows to connected RTL SoC assembly. The validated flow connects the Duolog industry-proven integration applications, Socrates, and the Cadence System Development Suite. To further support this flow, Duolog is extending its relationship with Cadence by joining the Cadence System Realization Alliance. Learn more
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California dreaming for Irish start-upsThe current crop of young companies in Enterprise Ireland’s Silicon Valley company incubator include Duolog (duolog.com): develops electronic design automation tools for integrating system components on to microchips Learn more
How to Stop “Insidious” Bugs at the HW/SW InterfaceThe webinar shows how hardware/software interface bugs arise, how they can be uncovered with help from the Universal Verification Methodology (UVM) register package, and how an automated register management tool can make life even more difficult for HW/SW bugs. Learn more
Partnership Improves IP-based SoC AssemblyDuolog Technologies Ltd has joined forces with Cadence Design Systems Inc. to validate system development flows to RTL SoC assembly. This is made possible by connecting Duolog’s integration applications, Socrates, and the Cadence System Development Suite. Learn more
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